The present invention relates to magnetic random access memories (MRAMs). Electronic appliances such as personal computers use electronic memory for data and program storage. Information is represented as bit patterns in the memory. Each bit can have two states, often referred to as a logical 0 and a logical 1 or just simply as 0 and 1.
Electronic memory often takes the physical form of a small silicon die contained within a plastic or ceramic package for physical protection. The silicon die contains the electronic circuitry of the memory and is a small piece of a larger silicon wafer, which allows a large number of memory “chips” to be manufactured together. Desirable characteristics for computer memory chips are random access, low cost, low power, high density, high speed, and writability. Often one characteristic is obtained at the expense of another. For example, extremely high-speed memory might not be low-cost, high-density, or low-power. Two types of electronic memory are frequently used in personal computers. One is dynamic random access memory (DRAM) and the other is static random access memory (SRAM).
DRAM has the characteristics of random access, low cost, moderate power, high density, moderate speed, and writability. The high density and low cost of DRAM are achieved by using tiny capacitors to store electrical charges representing the states of the bits in the memory. Unfortunately, this technique requires complex control circuitry to continually refresh the stored charges on the capacitors. If the charges are not refreshed, they leak away and the data they represent are lost. Continual refreshing of the stored charges results in increased power dissipation even when the memory is not being used, which is problematic for portable computing devices like laptop computers.
SRAM on the other hand, uses latching circuitry to store the states of the bits in the memory. Latching circuitry eliminates the need for complex refresh circuitry and allows SRAM to have very high speed. Unfortunately, the high speed is obtained at the expense of high density due to the increased amount of chip area required by the latching circuitry to store each bit. The lower density also leads to higher cost for SRAM. The extra circuitry used to store each bit also dissipates a large amount of power.
Another shortcoming of DRAM and SRAM is that they are both volatile memory technologies and so lose their stored data when power is removed. Volatile memory is problematic for portable electronic devices like laptop computers. To overcome the problem of volatility, a laptop computer writes the state of its memory to a magnetic storage disk before turning off the power. When the power is turned back on, the operating system and the programs that were previously in use must be restored to the electronic memory. This “boot up” delay is frustrating to many users and could be essentially eliminated if the electronic memory were non-volatile.
Flash memory mitigates the volatility problem for some portable electronic devices like cell phones and digital cameras. Flash memory is a type of EEPROM (electrically erasable programmable read only memory) where a bit of information is stored as a charge on an electrically isolated gate of a field effect transistor. The electrical isolation of the gate prevents the charge from leaking away and effectively makes the memory non-volatile. However, there are characteristics of flash memory that are problematic for its use as the memory of a personal computer. The first characteristic is that the memory has a limited number write/erase cycles. Secondly, to erase bits, a large section of memory is erased in a “flash,” which leads to its name.
MRAM is a non-volatile memory technology that relies on the relative magnetic orientations of two magnetic layers sandwiched on either side of a magnetoresistive layer to store data. When the magnetic orientations are parallel, the magnetoresistive layer has a low resistance and when they opposite (often termed anti-parallel), the magnetoresistive layer has a higher resistance. Circuitry on the chip can sense the resistance of a single bit cell and interpret the high or low resistance as either a binary 1 or 0. Since power is not required to maintain the magnetizations, data are retained in the bit cells when power is removed. This yields the non-volatile characteristic of MRAM technology as well reducing its power consumption.
MRAM technology also has other desirable characteristics. It has potential for high density due to the simplicity of the bit cell. Unlike DRAM, which also has a simple bit cell, MRAM does not require complex refresh circuitry. This leads to simpler memory system design and lower system cost. MRAM is also inherently high-speed due to the simplicity of the bit cell.
As previously described, the state of an MRAM memory cell is read by sensing its resistance. High-density memory chips necessitate small feature sizes. These feature sizes include the area of the memory cell and the thickness of its magnetoresistive layer as well as the width and thickness of the lines reading data from the cells. Unfortunately, extremely small feature sizes engender a higher sensitivity to manufacturing variation. This manufacturing variation causes variation in the resistance of different memory cells on the same chip. Furthermore, extremely thin lines have high resistance that leads to significant resistance variations between lines of different lengths. These characteristics are problematic to accurately sensing the resistance of an individual memory cell where the absolute resistance change of the cell between the logical 1 state and the logical 0 state is small compared to resistance variation due to the aforementioned manufacturing variation and line length variation.
Accordingly, there is a need for high-density MRAM that is not sensitive to manufacturing variations that are commonly associated with the small feature sizes of high-density memory chips.
Like reference numbers and designations in the various drawings indicate like elements.